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Intel-Wafer

In 2006, Intel decided to build a new GPU architecture, codenamed Larrabee. It didn't work, then Intel decided to re-spin it as a manycore architecture dubbed Knights Ferry. While the showtime KNF processors were prototypes with literal GPU silicon notwithstanding bolted on-die, follow-up chips like Knights Corner switched to a modified Pentium (P54C) architecture with x86 ISA back up, 4-way SMT, and upwards to 1.2TFLOPS of double-precision performance. The Knights Landing compages updated the CPU core to a heavily modified version of Intel's Silvermont uarch, increased the core count up to 72 cores, added MCDRAM (aka Hybrid Retentiveness Cube), AVX-512 support, and was supposed to set the phase for a 10nm refresh with 2nd-generation Omnipath — except Intel just quietly killed it.

You could be forgiven for non noticing, even if you read Intel's weblog postal service on SC17, the annual supercomputing convention. Out of the company's 828-word blog post, just 30 of them bargain with the counterfoil of Knights Hill, and it'south buried in a section labeled "Enabling Exascale." (PR pro tip: If y'all want to hide the negative news, put information technology under a positive header). It reads: "One pace nosotros're taking is to supersede one of the futurity Intel Xeon Phi processors (code proper name Knights Hill) with a new platform and new microarchitecture specifically designed for exascale."

Intel also had a part named Knights Factory in evolution, but we don't know much about that chip yet, beyond that information technology supports half-precision work like GPUs from AMD and Nvidia and is intended for AI and deep learning workloads. While nosotros don't know much nearly the low-level architecture of Knights Loma, we do know something nigh what kind of deployment Intel expected the chip to see, via the Aurora supercomputer projection.

Aurora-Facts

In that location are a few dissimilar ways to read this announcement, and we don't know which is authentic still.

The most direct is that Intel is canceling Knights Hill equally a separate production considering it believes it tin target both spaces (HPC, AI/DL) with the same office. Years ago, we talked about experimental research Intel had done into variable floating point computing, which saved on power past giving programmers the option to choose how much precision to retain on a case-past-example footing.

Second, it'southward possible that something has gone badly wrong with some aspect of the chip'due south design, to such an enormous degree that cancelling the project and starting over is the only way to fix it. This wouldn't automatically signal to something wrong with the CPU core, which sounded like a reasonable die shrink with some new features — it could be a scaling or ability consumption issue with another aspect of the design. There's no testify to suggest this is true, information technology's but a technical possibility.

Tertiary, there'south the take a chance that Intel has decided Knights Colina isn't going to hit the aggressive performance or capability targets it wants and is re-spinning the blueprint to do and so. Xeon Phi products accept always had a much longer cadence than other parts in the consumer or even enterprise — Intel has refreshed its Xeon processors much more rapidly, for example — and so, it may be thinking long-term about the time to come of exascale and choosing to take a hitting now rather than risk existence dethroned later on. Either way, don't exist surprised if Nvidia and fifty-fifty AMD play up this strategic gap with new launches of their own. Hat tip to Tech Report for sussing out Intel's blink-and-yous'll-miss-it announcement.